Guide, September 2026
Patenting Memory and Storage Inventions in 2026: Claim Strategy for DRAM, HBM, and NAND
Memory stopped being the boring part of the system. Bandwidth and capacity now gate AI performance, which puts cell design, stacking, controllers, and firmware back at the centre. Here is how to file on them.
Where the inventions are
- Cell and array. DRAM cell and capacitor structures, HBM stacking and through-silicon interconnect, 3D NAND string and word line architecture, periphery placement.
- Controllers and reliability. Command scheduling, refresh management, bank and channel arbitration, ECC schemes, read retry and voltage calibration, disturb mitigation, repair and redundancy.
- In-memory and near-memory compute. Operations performed in the array or in the periphery, and the host interface that exposes them.
- Storage-class and persistent memory. Media, addressing, persistence semantics, and failure behaviour.
- Interfaces and firmware. CXL and comparable interconnects, and the implementation choices a public specification leaves open. Then wear levelling, garbage collection, mapping tables, and thermal throttling.
Device, method, and system
- Device. Physical structure, reads on the die a competitor sells. Detectable by teardown, which makes it the easiest to enforce.
- Method. The operation: the bias sequence, the program or read algorithm. Reaches whoever operates the part, including a controller vendor or a system integrator.
- System. Host, interface, controller, and media together. Reads on the shipped product rather than the component.
Drawings, process flows, and continuations
In this art the figures are the disclosure. Cross-sections showing layer order and contact structure, array layouts, timing diagrams, and step-by-step process flows are what the examiner reads and what supports every amendment you will want to make later. Detail that is only in a figure is still in the specification; detail in neither is gone. Where the process is the invention, claim it as a method of manufacture, but pair it with structure claims that capture the fingerprint the process leaves, because a process claim you cannot prove from the finished device is hard to enforce.
Memory generations turn over faster than prosecution finishes. Keep a continuation pending in every family that matters, so you can write claims to what a competitor actually shipped against a priority date you already own. A family that issues with nothing pending has spent its optionality.
If you are an individual inventor or a small company
A small team here is usually selling a controller, a firmware layer, or an interface implementation rather than a fab-scale device. Claim what you ship and claim the method of operating it, and put real engineering detail in the provisional. Budget for drawings, because in this art thin figures produce thin claims. If a decision date matters for a funding round, the Track One guide covers the speed lever and the micro entity status guide decides what it costs. Firm fees are in the patent prosecution cost guide.
If you run a corporate patent program
Two things matter more than filing volume. First, keep continuations pending across the families that track your roadmap, so claim scope can follow the market. Second, coordinate filing with standards participation: what your engineers contribute to a public specification becomes prior art and may carry licensing commitments, so the filing has to lead the contribution rather than follow it. Clearance belongs in the same schedule; see the FTO guideand the data center patent guide for the system layer above the silicon.
Common questions
What memory and storage inventions are worth patenting?
Cell and array structures in DRAM, HBM stacks, and 3D NAND. Memory controllers, scheduling, and refresh management. Error correction and reliability schemes. In-memory and near-memory compute. Storage-class and persistent memory. Interconnect and interface work such as CXL. And firmware algorithms including wear levelling, garbage collection, and read disturb handling.
How do you claim a memory device versus a memory method?
The device claim recites the physical structure: cell geometry, array arrangement, stack order, contact and via structure. The method claim recites the operation: the sequence of biases, the read or program sequence, the timing. Both matter because they are infringed at different points. The device claim reads on the die that a competitor sells; the method claim reads on operating it, which can reach a customer or a controller vendor.
Can memory controller firmware be patented?
Yes, and firmware is often where the durable advantage sits. Wear levelling, garbage collection, read retry and voltage calibration, and thermal throttling policies are all claimable when tied to the physical behaviour of the medium. Anchor the claim in what the memory does, endurance, retention, disturb, latency, rather than in the abstract scheduling idea.
How should in-memory compute inventions be claimed?
In-memory and near-memory compute sits across the device and architecture boundary, so it needs claims on both sides. One set to the array and periphery that performs the operation, one to the method of performing it, and one to the system claim covering the host, the interface, and the memory together. The system claim is what reads on a product an integrator ships.
Are interface inventions like CXL patentable when the standard is public?
The published standard is prior art, so you cannot claim what the specification already discloses. Implementation choices left open by the standard are a different matter, and that is usually where the inventions are: how coherence is managed in your controller, how you handle latency and error cases, how you map the interface onto your media. Standards work also carries commitments that can affect enforcement, so the licensing position needs checking alongside the filing.
How important are drawings in a memory patent application?
They carry the case. Cross-sections, array layouts, timing diagrams, and process flow figures are where the technical content actually lives, and examiners in this art work from the figures. Underinvesting in drawings is the most common way a good memory invention ends up with claims narrower than the disclosure could have supported.
Why file continuations in a memory patent family?
Because the market moves faster than prosecution. A continuation keeps the family alive so you can write claims to what a competitor actually shipped two years after your priority date, using the disclosure you already filed. In a fast-moving process node or interface generation, a family with no pending continuation is a family that cannot respond to anything.
Should process steps be claimed as well as the resulting structure?
Where the process is the invention, yes. Fabrication sequences for 3D stacks, etch and deposition orders, and bonding steps can be claimed as methods of manufacture. The practical limit is detection: a process claim you cannot prove from the finished device is hard to enforce, so pair it with structure claims that capture the fingerprint the process leaves.
A practitioner's explainer, not legal advice on a specific device or portfolio. No figures on this page are USPTO fees; firm fees are published in the patent prosecution cost guide. To discuss a family, contact the firm.